![Figure 9 | A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product Figure 9 | A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product](https://static-02.hindawi.com/articles/tswj/volume-2014/453675/figures/453675.fig.009.jpg)
Figure 9 | A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product
![Figure 5 | A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product Figure 5 | A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product](https://static-02.hindawi.com/articles/tswj/volume-2014/453675/figures/453675.fig.005b.jpg)
Figure 5 | A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product
![digital logic - Analysis of two D flip-flop designs based on D latches - Electrical Engineering Stack Exchange digital logic - Analysis of two D flip-flop designs based on D latches - Electrical Engineering Stack Exchange](https://i.stack.imgur.com/EmEd4.png)